1. Field of the Invention
The invention relates in general to a method for measuring intrinsic capacitance of a metal oxide semiconductor (MOS) device, and more particularly to a method for measuring intrinsic capacitance of a short-channel MOS device.
2. Description of the Related Art
In a radio-frequency (RF), analog or digital combination circuit, the accuracy of a capacitance model analysis for a MOS device is very essential to a circuit designer. For example, a normal MOS field effect transistor has overlap capacitance, junction capacitance and intrinsic capacitance.
Referring to FIG. 1, a schematic diagram of an equivalent circuit of a small-signal of MOS field effect transistor is shown. As shown in FIG. 1, in a MOS field effect transistor 100, the charge amount QG of a terminal, such as the gate G, will be affected by variation of bias voltage of another terminal, such as VD. The corresponding relationship can be represented by the intrinsic capacitance
      Cxy    =          -                        ∂                      Q            x                                    ∂                      V            y                                ,      x    ≠    y    ,            and      ⁢                          ⁢              C        xx              =                  ∂                  Q          x                            ∂                  V          x                      ,wherein x and y can be a terminal D, G, S or B.
That is, the intrinsic capacitance CGD between the gate G and the drain D reflects the influence of the bias voltage VD of the drain D on the charge amount QG of the gate G. This intrinsic capacitance is not linear and is still affected by the voltages at the other three terminals. Furthermore, the intrinsic capacitance cannot normally be measured accurately for further model analysis. Conventionally, a LCR meter combined by suitable software can only measure the intrinsic capacitance CGX of a long-channel MOS device.